A technology according to which chips are stacked and these chips are mutually electrically connected by TSV (Through Silicon Via) is known. If the technology is applied to implementations of memory chips, high-speed large-capacity memory chips can apparently be realized. As a method of forming a TSV, a BSV (Backside Via hole) method by which an LSI is formed on the front side of chip and then holes are formed from the rear side of the chip on which no LSI is formed is known.
However, if the BSV method is adopted, a process of reducing the aspect ratio of holes by polishing the rear side of the chip to make the semiconductor substrate thinner is adopted. During the process, variations in thickness of the semiconductor substrate arise in accordance with the position on the rear face. Thus, if holes are formed on one chip at the same time, each hole may not be formed correctly because the depth of each hole is not the same. This results in degradation in reliability due to insufficient coverage when a conductive material is embedded in the holes.